CXMT Scores Two Victories in One Week: World's First LPDDR6, HBM3E Also Enters Trial Production

On August 31, the American tech media outlet The Information, citing two people familiar with the matter, reported that China's largest memory chip manufacturer ChangXin Memory Technologies (CXMT) has begun small-batch production of HBM3E high-bandwidth memory. Alibaba's T-Head Semiconductor and Cambricon are currently testing these products, with progress

💡 What You Will Learn

CXMT Scores Two Victories in One Week: World's First LPDDR6, HBM3E Also Enters Trial Production On August 31, the American tech media outlet The Information, citing two people familiar with the matte

📜 Table of Contents

• The VRAM bottleneck of AI chips
• One HBM chip eats three times the capacity
• Where CXMT stands this time
• It also landed LPDDR6 the same week
• Domestic AI chips finally have their own VRAM

CXMT Takes Two in One Week: World's First LPDDR6, HBM3E Enters Trial Production

On August 31, the American tech outlet The Information reported, citing two people familiar with the matter, that China's largest memory chipmaker CXMT has begun small-batch production of HBM3E high-bandwidth memory. Alibaba's T-Head Semiconductor and Cambricon are testing the products, and if things go smoothly, they will be used in domestic AI chips starting in 2027.

HBM is the most in-demand component sitting next to an AI chip.

The VRAM bottleneck of AI chips

HBM stands for high-bandwidth memory. The approach is to stack a dozen or so layers of memory chips using through-silicon via technology, package them tightly against the GPU, and feed data to the compute core through an ultra-wide interface. Nvidia's H200 and B300 use this HBM3E generation. During large model training, no matter how powerful the compute is, if data can't be fed in fast enough, it's just spinning its wheels — which is why HBM has become the hardware bottleneck for AI compute.

This market has long been monopolized by three players: SK Hynix, Samsung, and Micron. Among them, SK Hynix mass-produced HBM3E back in 2024 and was the sole supplier for Nvidia's H200. Now all three have entered the HBM4 stage and begun sampling the next-generation HBM4E.

One HBM chip eats three times the capacity

HBM is expensive and scarce, and the root cause is capacity. The stacking process means a single HBM wafer consumes roughly three times the capacity of a standard DDR5 wafer, with even higher yield requirements. TrendForce estimates that this year the three major manufacturers have allocated about 22% of their total DRAM capacity to HBM wafers, and that figure will rise to 30% by 2027. Nvidia's and AMD's GPUs, along with various in-house AI chips, have bought up the entire HBM output of the big three.

When capacity is grabbed by AI, the consequences ripple directly into the consumer market: DDR5 memory, phone LPDDR5X, and graphics card VRAM have all been rising in price over the past two years. A standard memory kit for a PC build costs significantly more than it did two years ago — and the reason behind it is HBM competing for wafers. Once CXMT's HBM3E achieves volume production, domestic AI chips will have their own VRAM supply and no longer need to compete with global buyers for the big three's output.

Where CXMT stands this time

Judging by JEDEC international standards, HBM3E uses a 1024-bit interface with per-pin speeds of 9.2 to 12.4 Gbps, total bandwidth of about 1.2 TB/s, and per-stack capacity of 24GB (8-layer stack) or 36GB (12-layer stack). CXMT has not officially disclosed specific parameters.

This step is called risk trial production, and there's still a distance to volume production. Three buckets of cold water need to be thrown first:

• SemiAnalysis estimated in June this year that CXMT's HBM yield is about 25% — four chips made to get one good one;
• By generation, HBM3E is one generation behind the big three's current HBM4 and two generations behind the already-sampled HBM4E. The Information puts the technology gap at 3 to 5 years;
• CXMT just listed on the STAR Market on July 27, raising about $8.6 billion, but its prospectus did not earmark this money specifically for HBM, and the source of funding for production lines hasn't been made clear.

It also landed LPDDR6 the same week

A few days before HBM3E, CXMT had just announced mass production of LPDDR6, beating Samsung and SK Hynix to become the world's first manufacturer to mass-produce LPDDR6, debuting on Xiaomi's 18 Fold foldable phone. Its two 12-inch fabs in Hefei and Beijing currently produce about 200,000 wafers per month, with a year-end target of 350,000.

Domestic AI chips finally have their own VRAM

US export controls have long restricted domestic procurement of advanced HBM. Cambricon's SiYuan 590, 690, and other AI chips are benchmarked against the A100 and H100 in performance, but with limited VRAM supply they can only use GDDR6 or DDR4 as substitutes, falling a tier behind in bandwidth and power efficiency. Only after domestic HBM3E achieves volume production will domestic AI accelerator cards have a matching high-speed VRAM solution for the first time.

When CXMT previously made DDR5, it took only a few weeks to go from risk trial production to large-scale shipment. HBM's process difficulty is far higher than ordinary memory, and the industry's general assessment is: first get past the "can we make it at all" hurdle, and yield and output can be chased later.

HBM market landscape:

That said, the 25% yield and the two-generation gap are sitting right there in plain sight. From risk trial production to volume production, CXMT still has a tough battle ahead.

How many years will it take for domestic HBM to catch up? By 2027, will T-Head's and Cambricon's chips actually be using CXMT's VRAM? Sound off in the comments with your take.