Future CPUs Will Come with Built-in AI Compute Power: AMD and Intel Join Forces to Set a New Standard

AMD and Intel are teaming up.

This isn't a marketing partnership or a joint chipset specification—the two x86 archrivals have come together under the x86 Ecosystem Advisory Group (EAG) to define a brand-new AI instruction set called ACE (AI Compute Extensions).

The latest specification, v1.15, has been released. Its core idea in a nutshell: Stuff a matrix multiplication engine directly into the CPU core.

16x Density Crushing, But Not Replacing GPUs

First, let's talk about what ACE does.

Current CPUs rely on the AVX (Advanced Vector Extensions) instruction set for AI computation. But it has a fundamental flaw: matrix multiplication requires a massive number of multiply-accumulate operations. AVX's scalar and vector units are inefficient at this, limiting compute density.

ACE's solution is to add a new set of tile registers and outer product compute units specifically designed for matrix multiplication.

It's deeply tied to AVX10—ACE's inputs and outputs go directly through AVX10's vector registers. ACE only handles the most compute-intensive part: matrix multiplication. The compute density of a single ACE outer product operation is 16 times that of an equivalent AVX10 multiply-accumulate operation, without increasing power consumption.

But don't get it twisted. It's not meant to replace GPUs. Analyst Jim McGregor put it plainly: CPUs will never be more efficient than GPUs/AI accelerators. ACE's real value lies in scenarios where discrete GPUs and NPUs can't be installed—embedded devices, edge computing, thin-and-light laptops.

Supporting 11 Data Formats in One Go

The ACE v1 spec lists 11 data formats, covering the mainstream low-precision formats used in AI inference today:

• Base formats: INT8, INT32, FP32, FP16, BF16
• OCP MX formats: MX FP8, MX FP6, MX FP4, MX INT8
• Specialized formats: E8M0 (unsigned 8-bit exponent, for block scaling), FP8 (OCP OFP8 spec)

What this means: ACE can directly understand the quantized weight formats used in AI model inference. Data like FP8 and MX FP4 in models doesn't need to be converted to FP32 first—ACE natively supports it and computes directly.

This is a tangible boost for both inference efficiency and memory bandwidth.

Earliest 2028—Don't Rush to Upgrade

So when can you actually use it?

Based on the known roadmap: The first wave of ACE-v1 processors won't arrive until at least 2028.

• AMD's Zen 6 and Intel's Nova Lake don't mention ACE on their roadmaps
• AMD's Zen 7 plans include a new "Matrix Engine"—likely ACE
• Intel has no corresponding product codename yet

In other words, ACE isn't coming in the next year or two. Buying a Zen 6 or Arrow Lake CPU now won't let you reap ACE's benefits. Wait for Zen 7.

For comparison, ARM's SME2 (Scalable Matrix Extension) is already deployed—Apple's M4 and Qualcomm's Snapdragon X2 both use it. x86 has indeed fallen behind on AI instruction sets, but ACE at least puts AMD and Intel on the same starting line.

What It Means for Regular Users

In plain English:

If you only game, browse the web, and run Office—ACE has nothing to do with you. Your workloads don't use matrix multiplication.

If you run local AI models (LLM inference, Stable Diffusion, local RAG)—ACE will be useful. But only if your CPU supports ACE and the software ecosystem catches up. Don't count on it before 2028.

If you're into embedded/edge AI development—ACE is a signal worth watching. It means that in the future, running AI inference on x86 devices without a GPU, the CPU can handle it on its own.

There's another easily overlooked point: ACE is jointly defined by AMD and Intel, meaning the same AI code will produce identical results on both companies' CPUs, with no separate optimization needed. This is a first in x86 history. Previously, AMD used AVX2 and Intel used AVX-512, with fragmented ecosystems that forced developers to cater to both. ACE bridges that gap.

Personal Take: x86's "Unified Front" Matters More Than ACE Itself

The ACE v1 spec isn't mind-blowing. It supports many formats, but they're mostly already in use (MX FP4/FP6/FP8 are OCP standards). The 16x compute density over AVX10 is impressive, but ARM's SME2 is already shipping in the M4 chip.

I think what truly matters isn't how powerful ACE is, but who's pushing it.

AMD and Intel, historic archrivals, are now sitting at the same table due to pressure from ARM and RISC-V. Beyond ACE, the EAG has also worked on FRED (Flexible Return and Event Delivery), AVX10 (unified AVX ecosystem), ChkTag (memory safety tags), and APX (Advanced Performance Extensions)—all jointly defined and uniformly deployed.

This "unified front" sends a stronger signal than any single instruction set's performance numbers. x86 has never been as fragmented as it is now (just look at the AVX-512 mess across different Intel chip generations), and it has never been as far behind in AI. ACE's 16x density isn't the answer—a unified ecosystem that lowers developer costs is x86's real trump card against ARM.

Over to You

So here's the question: Can ACE pull x86 back onto the AI table? Or will ARM already be a generation ahead by the time you can actually buy an ACE-enabled CPU? Are you waiting for Zen 7, or jumping ship to the M-series or Snapdragon X?